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Allegro DVT Enhances Its Multiscreen Headend Appliances at IBC 2013

2013-09-12 06:00:00| Industrial Newsroom - All News for Today

Live Demonstration of Allegro DVT's HEVC/H.265 Main10 Video Decoder IP at IBC 2013<br /> <br /> GRENOBLE, France,  -- At IBC, Allegro DVT will demonstrate the final, fully validated, ready for tape out, version of its HEVC Main10 profile 4K@60fps video decoder IP.<br /> <br /> Allegro DVT will show a FPGA demonstration for its AL-HEVC-D decoding IP. Allegro DVT's AL-HEVC-D is a hardware decoder IP core, which supports the next generation HEVC (High Efficiency Video Coding) standards. It is the ...This story is related to the following:Communication Systems and EquipmentSearch for suppliers of: Video Decoders

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