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Non-Volatile Memory IP suits high-voltage processes.

2014-07-11 14:30:34| Industrial Newsroom - All News for Today

Available in standard 180 nm 5 V CMOS and Bipolar CMOS DMOS processes without need for additional masks or process steps, DesignWare® AEON® Trim NVM IP supports -40 to 150°C temperature range required for automotive Grade 0 applications and exceeds AEC-Q100 quality standards. IP includes special test modes that accelerate programming speed and reduce NVM test time. Offering 15+ year data retention, IP lets designers implement ICs in harsh and safety-critical environments. This story is related to the following:Central Processing Unit (CPU), Intellectual Property (IP), Microprocessor & Processor Cores

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