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Verification IP supports PCIe 4.0.

2014-12-16 14:32:23| Industrial Newsroom - All News for Today

With design-aware Mentor® EZ-VIP PCI Express Verification IP, engineers can reduce time spent building test benches for ASIC and FPGA design verification. PCIe EZ-VIP includes pre-packaged verification environments for serial and parallel interfaces of PCIe 1.0, 2.0, 3.0, 4.0, and mPCIe, which can be used to verify PHY, Root Complex, and Endpoint designs. Test plans, compliance tests, test sequences, and protocol coverage are included as SV and XML source code.

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