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Video Over IP FPGA Reference Design fosters 4K upgrade capability.

2014-03-27 13:31:17| Industrial Newsroom - All News for Today

Complete SMPTE2022 FPGA reference design combines intoPIX JPEG2000 compression and MPEG2-TS cores with Macnica SMPTE2022 IP-core to carry 3G-SDI with JPEG2000 compression over ST2022 1-2 on Altera Stratix V FPGA. Leveraging Macnica ST2022 5-6 IP-cores, reference design can also carry uncompressed 3G-SDI over 10G network. With MPEG-2-TS encapsulation layer, intoPIX JPEG2000 IP-cores are fully compliant with VSF (Video Services Forum) Technical Recommendation. This story is related to the following:Electronic Components and Devices Sponsored by: Globtek Inc. - Your Power Partner...For Over 20 Years!Search for suppliers of: Gate Arrays

Tags: video design reference upgrade

 

FPGA IP Cores utilize lightweight compression technology.

2014-03-20 13:31:33| Industrial Newsroom - All News for Today

Without any usage of external memory, TICO FPGA IP Cores provide lightweight, visually lossless, disruptive compression up to 4:1, with fixed latency of few pixel lines for HD, 4K, or 8K. Technology offers smart solution to increase number of streams or stream resolution that could be supported in multi-stream configuration; reduce internal video bandwidth in systems such as mobile devices, cameras, and displays; and increase storage or video/frame buffer capacity. This story is related to the following:Central Processing Unit (CPU), Intellectual Property (IP), Microprocessor & Processor Cores

Tags: technology utilize compression lightweight

 
 

FPGA Embedded Instruments support multi-channel BERT.

2014-03-14 13:30:37| Industrial Newsroom - All News for Today

Offering IP-based technology for implementation, access, and control of chip embedded instruments via IEEE Std. 1149.x/JTAG, ChipVORX® also supports FPGA embedded instruments in form of softcores. System takes over complete process flow, including Target FPGA programming, IP to pin configuration, instrument control, data processing, and final IP unloading. Users can evaluate transmission channel quality via parallel measurement of bit error rate on all channels simultaneously. This story is related to the following:Bit Error Rate (BERT) Testers

Tags: support instruments embedded bert

 

Programmable FPGA targets automotive applications.

2014-03-03 14:30:29| Industrial Newsroom - All News for Today

Supplied in packages as small as 10 x 10 mm, Xilinx® Automotive (XA) Artix®-7 AEC-Q100 qualified FPGAs comprise 4 devices that provide 30k–101k logic cells and up to 285 I/Os. DSP capabilities provide up to 264 GMACs of signal processing performance, while integrated Gigabit transceivers support data rates up to 6.25 Gbps. Other features include dynamic partial reconfiguration (DPR), AES encryption, and integrated Analog Mixed Signal (AMS) block. This story is related to the following:Programmable Logic Devices | Arrays

Tags: applications automotive targets programmable

 

Xilinx expands all programmable Artix-7 FPGA family with new automotive qualified devices

2014-02-24 21:30:52| Green Car Congress

Tags: family automotive devices qualified

 

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