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Barco Silex FPGA Design Speeds Transactions in Award-winning Atos Worldline Hardware Security ...

2013-04-07 06:00:00| Industrial Newsroom - All News for Today

Atos Worldline&rsquo;s ADYTON integrates Barco Silex&rsquo;s FPGA design and crypto IP to handle 7000 RSA op/s @ 250 MHz<br /> <br /> Louvain-la-Neuve -- Barco Silex, a leading provider of crypto IP solutions and ASIC / FPGA design services, today announced that hi-tech transactional services expert, Atos Worldline, uses a Barco Silex FPGA crypto platform in its ADYTON. The ADYTON, which recently received an iF product design award in addition to its red dot product design award , integrates ...This story is related to the following:Central Processing Unit (CPU), Intellectual Property (IP), Microprocessor & Processor Cores

Tags: design security hardware transactions

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