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Home › CAE Software reduces compile time for FPGAs and SoC FPGAs.

 

CAE Software reduces compile time for FPGAs and SoC FPGAs.

2013-12-18 14:31:02| Industrial Newsroom - All News for Today

FPGA design software suite, Libero SoC v11.2, enhances productivity for designers using features in SmartFusion®2 SoC FPGAs and IGLOO®2 FPGAs. Along with incremental compilation option, features include System Builder with correct-by-construction, step-by-step guide for configuring and implementing system designs; SmartDesign design canvas tool; SmartPower maximum process power analysis and thermal analysis capabilities; and SmartDebug SERDES physical media attachment (PMA) analysis. This story is related to the following:CAE Software

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