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FPGA Mezzanine Card combines A/D and D/A converter.

2015-01-16 14:30:49| Industrial Newsroom - All News for Today

Compliant to VITA 57 specification, Model FMC525 combines 14-bit 5.7 Gsps D/A converter and 12-bit 4.0 Gsps A/D converter. DAC core is based on quad-switch architecture that enables dual-edge clocking operation, increasing DAC update rate to 5.7 Gsps when configured for Mix-Mode™ or 2x interpolation. Input sampling clock can be via front panel or on board wide-band PLL. Model FMC525 is suited for RADAR, LTE/Broadband communications systems, ATE, and video/broadcast uses.

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