Partitioned optimally into ARM Cortex-A9 Software and FPGA Hardware on Xilinx Zynq-7000 All Programmable SoCs, Hybrid HEVC (H.265) Decoder enables flexible, highly integrated video systems. Since decoder only uses portion of FPGA logic resources on Zynq-7000 SoC, remaining hardware resources can be used to integrate external display interfaces like DisplayPort, SD/HD/3G-SDI, and LVDS for single or multi-panel displays. Decoder is compliant to HM version 13.0 and scalable from HD to Ultra HD.
This story is related to the following:Video Decoders |