Available for Sercos III master and slave controllers for automation devices, Sercos III IP Core includes all hardware functions, such as timing, synchronization, and processing of cyclic and non-cyclic data on basis of 2 integrated Ethernet MACs. Sercos III master and slave devices can be implemented as single chip solution using either Xilinx Artix®-7 FPGAs, other FPGAs of 7 series, or Zynq SoC devices, which integrate ARM® dual-core Cortex™-A9 processor.