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MicroElectronics Engineer
2021-08-03 10:13:43| Space-careers.com Jobs RSS
Permanent Dutch contract of employment. Salary Industry leading basic salary. Benefits full healthcare, 14.5 pension contribution, 30 days vacation, annual training budget, ESTEC social club membership, generous geographic relocation and internal structured bonus. The role will be based at our clients site at ESTEC Noordwijk. Tasks Responsibilities Supervision of the endtoend development of new FPGAs throughout all the development phases specification, architectural design, detailed design, place and route, programming and device tests Critical review of the technical documentation, design files, hardware test platforms and software used during the different phases of the FPGA developments Providing technical feedback and advice to ESA and industry mission teams to help achieve successful and ontimeonbudget new FPGA developments and to solve problems related to already developed FPGAs Leading andor providing support to research internal in ESTEC Microelectronics Laboratory andor external with companies contracted by ESA activities in the domain of FPGAs devices and their tool ecosystems for use in space environment Provision of VLSI ASIC FPGA technical expertise to Projects involving requirements analysis, performance and budgets analysis, writing and assessment of VLSI specifications review, evaluation and checking of industrial contractors VLSI designs. Identification of design deficiencies and problem areas and proposals for their solutions Design, analysis, verification of VLSI systems for control and data processing applications, andor signal processing using industrial standard tools, hardware description and programming languages The post holder will support ASIC andor FPGA technology developments for RD and or projects, supervising that good design practices and manufacturing and test methodologies are applied. In addition, independent verification through code inspection, simulation and timing analysis and validation through HW tests will have to be carried out for some ASIC and FPGAS developments For this specific position, experience working with ASIC technology will be a valued extra asset. The work to be done, however, will be for FPGA and not ASICs When asked to support development contracts regarding the above areas, act as the activity technical responsible, maintain interfaces with the prime contractors, participate in progress meetings and reviews, as requested, and provide appropriate feedback on the achieved progress and discussions When supporting projects, interface with ESAs project teams, the prime and lower level contractors, participate in progress meetings and reviews, as requested by project work, and provide appropriate feedback on the achieved progress and discussions. Requirements Master degree in Electronics Engineering or Physics, specialized in Microelectronics Minimum 4 years of experience in Design and test of digital FPGAs specifications, block design, top level integration, design for test, pre and post layout simulation and timing analysis, gates synthesis, support during layout, prototype test and in system validation, with proficiency in HDL VHDL, Verilog and SystemC VLSI IC Design CAD tools such as Synopsys, CADENCE, Mentor, Matlab andor Simulink FPGA HW and SW of several vendors such as Xilinx, Microchip former Microsemi, former ACTEL, NanoXplore, Altera andor Atmel Preparation of FPGA testbenches, for functional validation and electrical characterization, using signal generators, oscilloscopes and signal analyzers Basic system administration in UNIX and Windows for IC Design CAD tools Important additional assets would be Experience with Microprocessors e.g. LEON, ARM, RISCV and HWSW codesign Experience with mitigation of radiation effects andor radiation tests of FPGAs andor ASICs Experience with digital ASIC design Knowledge of the Space environment, its effects on microelectronics devices and related technology, as well as ECSS quality standards applied to space VLSI ICs Sound judgment, integrity and good communications skills A very good working knowledge of spoken and written English is essential. The recruitment process will consist of an initial telephone discussion andor a video call followed by presentation of your candidature to ESA. If selected for interview by ESA, a face to face or virtual technical assessment will be conducted by responsible staff. Starting date should be within 2 months of successful recruitment. Deadline for applications 12th September 2021 Moltek is a subsidiary of CS Group SA SXFPEN Paris. and as such, provides career growth, training and inclusion not just in the context of roles at the ESA but also amongst the wider company as a whole.
Tags: engineer
microelectronics
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