Home › TSMC Selects Berkeley Design Automation Analog FastSPICE Mega For 16-nm FinFET-Based Memory Verification
 

Keywords :   


TSMC Selects Berkeley Design Automation Analog FastSPICE Mega For 16-nm FinFET-Based Memory Verification

2013-05-30 14:00:00| rfglobalnet News Articles

Berkeley Design Automation, Inc., provider of the world’s fastest nanometer circuit verification, recently announced that TSMC is using Analog FastSPICE Mega (AFS Mega) for memory IP verification.

Tags: design memory analog mega

Category:Telecommunications

Latest from this category

All news
»
04.10Hurricane Kirk Graphics
04.10Hurricane Kirk Forecast Discussion Number 22
04.10Tropical Storm Leslie Forecast Discussion Number 10
04.10Hurricane Kirk Wind Speed Probabilities Number 22
04.10Hurricane Kirk Public Advisory Number 22
04.10Summary for Hurricane Kirk (AT2/AL122024)
04.10Tropical Storm Leslie Public Advisory Number 10
04.10Summary for Tropical Storm Leslie (AT3/AL132024)
More »