Home Via-Filling Process promotes 3D-IC/TSV packaging reliability.
 

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Via-Filling Process promotes 3D-IC/TSV packaging reliability.

2013-09-09 14:30:32| Industrial Newsroom - All News for Today

Available on EVG100 resist processing systems, NanoFill™ polymer via-filling process for 3D-IC/through-silicon-via (TSV) semiconductor packaging applications. This suits polymeric dielectrics, offering flexible, production-ready platform for interposer development. Without forming voids or cavities, solution provides complete via filling for permanent passivation and planarization. Sidewall passivation option lends to throughput benefits for select applications. This story is related to the following:Void Fillers

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