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Video Over IP Reference Design optionally supports JPEG 2000.

2013-09-19 14:31:47| Industrial Newsroom - All News for Today

Multi-channel Video over IP with JPEG 2000 reference design integrates BarcoSilex JPEG2000 Encoder and Decoder IP Cores; Barco Silex high-performance memory controller core; SMPTE 2022-1/2 and Ethernet MAC LogiCORE™ IP Cores from Xilinx (available for Xilinx 7 Series FPGAs); and Zynq® All Programmable SoC. Solution can encapsulate and de-encapsulate up to 4 HD streams (1080p60), optionally compress or decompress those 4 streams with JPEG 2000, and transport them over 1 or 10 Gbps Ethernet. This story is related to the following:Computer Hardware and PeripheralsCommunication Systems and EquipmentSearch for suppliers of: Integrated Video Circuits | Video Random Access Memories (VRAM) | Video Decoders |

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