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Tag: design
IXYS Announces Digital Inrush Current Controller Reference Design Based On Zilog's Z8F3281 MCUs And IXYS Power Semiconductors
2015-06-26 03:28:23| electronicsweb Home Page
IXYS Corporation, a manufacturer of power semiconductors and ICs for energy efficiency, power management, medical, transportation and consumer applications, recently announced the release of a reference design that makes use of Zilog’s 8-bit Z8F3281 microcontroller - Digital Inrush Current Controller
Tags: based
design
current
power
Arcadis wins Doha Gold Line design contract
2015-06-26 01:00:00| Railway Technology
Netherlands-based Arcadis has secured a 20m contract from Qatar Rail Company to provide architectural, branding, design and construction consultancy services for the Gold Line metro line in Doha.
Tags: line
design
gold
contract
2015 Top 40 Electrical Design Firms Map
2015-06-25 21:47:00| Electrical Construction & Maintenance
To highlight EC&M's 2015 Top 40 Electrical Design firms, we've created an interactive map for your convenience. read more
Tags: top
map
design
electrical
Flow Sensors feature clamp-on design.
2015-06-25 14:31:06| Industrial Newsroom - All News for Today
Designed to clamp on to outside of pipe, FD-Q Series can accurately sense flow of liquid through metal or resin pipes ranging from ¼–2 in. Sensors can detect virtually any type of fluid, including flow of water, oils, chemicals, and consumer products. Since sensors do not directly contact liquid, concerns of contacting corrosive liquids or contaminating product are eliminated.
Tags: design
feature
flow
sensors
On-Chip Network enhances SoC design based on physical synthesis.
2015-06-25 14:31:06| Industrial Newsroom - All News for Today
Expanding on interleaved multi-channel technology (IMT), SonicsGN® 3.0 includes layout optimization features for design flows based on physical synthesis as well as place and route tools. SoC designers can eliminate multi-channel DRAM access bottlenecks with IMT and reduce layout tool iterations with flexible user control of hierarchical RTL partitioning and re-timing stage insertion. Also included, flexible reordering buffer architecture enhances concurrency.
Tags: based
design
network
physical
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